Infineon Introduces TSC Q-DPAK CoolSiC MOSFETs for Industrial Power

HomeIndustry update

Infineon Introduces TSC Q-DPAK CoolSiC MOSFETs for Industrial Power

VinFast Sets Up EV Factory in Tamil Nadu
JBM Electric Vehicles launches ECOLIFE electric bus at UITP Summit 2025
Machine Tool Demand Sees Ongoing Decline: Stabilization Anticipated by Year-End

Infineon Technologies AG, has introduced the CoolSiC™ MOSFETs 1200 V G2 in a top-side-cooled (TSC) Q-DPAK package. These new devices offer enhanced thermal performance, improved system efficiency, and higher power density. They are specifically designed for high-performance, high-reliability industrial applications including EV chargers, solar inverters, UPS systems, motor drives, and solid-state circuit breakers.

The new CoolSiC 1200 V G2 technology delivers up to 25% lower switching losses compared to previous-generation devices with equivalent RDS(on), improving system efficiency by up to 0.1%. Leveraging Infineon’s enhanced .XT die attach interconnection, the G2 series also achieves over 15% lower thermal resistance and an 11% drop in MOSFET temperature versus the G1 family. With RDS(on) values ranging from 4 mΩ to 78 mΩ and a wide product portfolio, designers gain greater flexibility to optimize system performance. The technology also supports overload operation at junction temperatures up to 200°C and ensures high reliability under dynamic conditions with strong resistance to parasitic turn-on.

The CoolSiC MOSFETs 1200 V G2 are available in two Q-DPAK configurations: a single switch and a dual half-bridge. Both variants are part of Infineon’s broader X-DPAK top-side cooling platform. With a standardized package height of 2.3 mm across all TSC variants – including Q-DPAK and TOLT – the platform offers design flexibility and enables customers to scale and combine different products under a single heatsink assembly. This design flexibility simplifies advanced power system development, making it easier for customers to customize and scale their solutions.

The Q-DPAK package enhances thermal performance by enabling direct heat dissipation from the device’s top surface to the heatsink. This direct thermal path delivers significantly better heat transfer efficiency compared to traditional bottom-side cooled packages, enabling more compact designs. Additionally, the Q-DPAK package layout design allows for minimized parasitic inductance, which is critical for higher switching speeds. This enhances system efficiency and reduces voltage overshoot risk. The small footprint of the package supports compact system designs, while its compatibility with automated assembly processes simplifies manufacturing, ensuring cost-efficiency and scalability.

COMMENTS

WORDPRESS: 0
DISQUS: